Fundamentals of Digital Design
Ray Mitchell

Course Outline

The following outline indicates what will be covered and when, but is subject to modification based on specific class needs.  I will normally cover as much as possible in each class.  Section numbers refer to "Digital Logic Design Notes".

1          Course Overview and Introduction
            S1. I               Positional Number System Characteristics and Base Conversions
            S1. II              Representation and Manipulation of Negative Numbers Using Complements
            S1. III-IV        Binary Numeric Representations, Codes, and Storage
            S2. I-II            Binary Logic, Integrated Circuits
            S2. III             Boolean Algebra and Function Simplification 

2          S2. III             Boolean Algebra and Function Simplification, cont’d.
            S2. IV             Standard and Canonical Forms
            S3. I-II            Digital Circuit Operating Parameters I
                                           The TTL Data Book
                                           DC Conditions and Characteristics I  -  Voltage Parameters

 3         S3. III              The Resistor Color Code
            S3. IV              Ohm's Law
            S3. V-VI          Typical Lab Circuits and Procedures
            S4. I-III            Digital Circuit Operating Parameters II
                                            DC Conditions and Characteristics II  -  Current Parameters
                                                    Interfacing Different Logic Families 

4          S4. I-III            Digital Circuit Operating Parameters II, cont’d.
                                            Device Output Configurations  -  Totem Pole, Tri-State, and Open Collectors
                                             AC Conditions and Characteristics  -  Propagation Delay and Noise
           S5. I                 The Karnaugh Map Method of Boolean Equation Simplification
                                             Don't Care Conditions
            S5. II                Non-Inverting vs. Inverting Logic Elements 

5          S5. III               Arbitrary Code Converters
            S5. IV               Adders and Subtractors
                                            Programmable Inverters
            S5. V                NAND and NOR Equivalence
            S5. VI               Exclusive OR and Exclusive NOR Gates
                                             Comparators, Parity Circuits
            S6. I                 Decoders, Decoders as Minterm Generators;  Encoders, Priority Encoders 

6          S6. II                Multiplexers, Multiplexers as Function Generators
            S6. III               Programmable Logic Devices (PLDs)
                                             Read-Only Memory (ROM)
                                                     As Storage for Computer Programs and as Logic Function Generators
                                                     ROM Types
                                                     Control and Timing
                                             PALs, PLAs, GALs, and Gate Arrays
            S7. I                 Elements of Sequential Logic
                                            Flip-Flop Types, Function Tables, and Characteristic Equations
                                            Excitation Tables 

 7          S7. I                 Elements of Sequential Logic, cont’d.
                                             Timing Parameters
                                             Metastability
                                             Multibit Registers
            S8. I.A & I.B    Clocked Synchronous State Machine Structure and Analysis
            S8. I.C              Clocked Synchronous State Machine Design 

8          S8. II                Counters
                                             Ripple Counters
                                             Synchronous Counters
                                             Variable Modulus Counters
            S9. I                 Miscellaneous Topics
                                             The 555 Timer
                                             Switch Debouncing
                                             Differential Circuits
                                             Monostable Multivibrators 

9          S9. II                Shift Registers and Applications
            S9. III               Read Only Memory and Static Random Access Memory
            S9. IV               Dynamic Random Access Memory
            S9. V                Designing an Elementary Microprocessor Memory System
            S9. VI               The ABEL* Programming Language

*ABEL is a trademark of Data IO Corporation.

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